The invention pertains generally to differential signal drivers. More particularly, one embodiment of the invention relates to transistor-based low voltage differential signaling driver circuits.
Various types of data transmission schemes, within a device or between two or more devices, have been developed.
One type of data transmission is differential data transmission in which the difference in voltage levels between two signal lines forms the transmitted signal. For example, differential data transmission is commonly used for data transmission rates greater than 100 Mbps over long distances.
Driver circuits are employed to place and drive signals on a transmission line or medium. Low voltage differential signaling (LVDS) drivers are commonly employed in many applications including driving signals from a transmitter to a receiver. Typical LVDS drivers may permit high speed transmissions, use low power, have low electromagnetic interference (EMI), and are low in cost.
An example of a conventional LVDS driver circuit 100 is shown in FIG. 1. The difference in voltage between the output signals OUT+ and OUTxe2x88x92 form the pair of differential signals. A pair of differential signals means two signals whose current waveforms are one hundred eighty degrees (180xc2x0) out of phase with one another.
The LVDS driver circuit 100 includes a first direct current (DC) constant current source I1 coupled to a voltage supply VDD, two p-channel metal oxide semiconductors (PMOS) P1 and P2, two n-channel metal oxide semiconductor (NMOS) N1 and N2 (differential pairs), and a second DC constant current source I2 coupled between a common node COM and ground. The our differential pair transistors P1, P2, N1, and N2 are controlled by input voltage signals D+ and Dxe2x88x92 and direct current through load resistor RLOAD as indicated by arrows A and B. The input voltage signals D+ and Dxe2x88x92 are typically rail-to-rail voltage swings.
The operation of the LVDS driver circuit 100 is explained as follows. Two of the four transistors P1, P2, N1, and N2 turn ON at the same time to steer current from current sources I1 and I2 to generate a voltage across resistive load RLOAD. To steer current through resistive load RLOAD in the direction indicated by arrow A, input signal D+ goes high turning ON transistor N1 and turning OFF transistor P1, and input signal Dxe2x88x92 simultaneously goes low turning ON transistor P2 and turning OFF transistor N2.
Conversely, to steer current through resistive load RLOAD in the direction indicated by arrow B, input signal Dxe2x88x92 goes high to turn ON transistor N2 and turn OFF transistor P2, input signal D+ goes low to turn ON transistor P1 and turn OFF transistor N1. As a result, a full differential output voltage swing can be achieved.
Differential LVDS driver circuit 100 works well as long as the output voltage swing stays within the allowable common mode voltage range, usually a few volts.
This driver 100 has the advantage of providing good power supply rejection. Common-mode voltage VCM is established by an external bias voltage through resistor R1. Ideally, common-mode voltage is maintained at a certain level or within a certain range. In many driver applications, a common-mode of 1.25 volts is employed.
One disadvantage of this driver 100 is that it requires higher power supply levels to keep the transistors properly biased. The transistors that form the current sources I1 and I2 must have sufficient voltage across them to be in saturation. The differential pairs P1, P2 and N1, N2 have a minimum voltage drop associated with the output current and channel resistance. Finally, all of this has to remain properly biased throughout the output signal swing range. Some margin must be added to allow the driver to work over all process, voltage and temperature (PVT) variations. This biasing requirement applies to the CMOS circuit shown or for bipolar junction transistors. For example, a typical LVDS push-pull driver requires at least a 2.5-volt supply to remain properly biased around a 1.25-volt nominal common-mode level.
Thus, the supply voltage level required by conventional LVDS drivers restrict development of lower power applications and devices with power supplies lower than 2.5 volts.